Industry challenges of 3D IC at scale

AI and HPC workloads are driving chiplets and 3D integration from niche to mainstream as Hyperscalers are already delivering second and third generation 3D IC based solutions. Apart from HBM memory, most designs utilize chiplets designed and integrated by a single company and sourced from a single foundry enabling tight control over supply chain and D2D interoperability and performance.

As 3D IC designs starts increase across the broader market Engineers face the growing pains of rapidly changing ecosystem. Access to manufacturing capacity for key packaging technologies, integrating chiplets from different foundries and suppliers, and challenges with D2D communications compatibility even with standards like UCIe are a few of the hurdles facing new users.

This panel will examine the technical and economic impact of these challenges while providing perspective on the rapidly evolving supply chain and new technology options. We’ll explore the pros and cons of interface standards and what’s needed to enable D2D interoperability in an open marketplace.