A weak power grid and inadequate power hookup can cause inaccurate electrical modeling. The Intel Graphics team worked with Siemens EDA to enable the Calibre DesignEnhancer via enhancement use model in multiple TSMC-based projects across multiple processes to improve power grid robustness by placing additional vias on the power grid at missed locations. The presentation discusses how the Calibre DesignEnhancer via enhancement kit was integrated into the Intel Graphics’ team environment and automated for ease of use. We demonstrate the improvements in power delivery network (PDN) and reliability parameters that increased signoff confidence, and discuss future enhancements planned for the Calibre DesignEnhancer via enhancement use model.