Missing fillercells cause continuity gaps for well, implant, and power routing which can can result in many DRC errors. By performing a basic design integrity check on LEF/DEF data, designers can quickly identify these regions. The video demonstrates how to map the COMP, ROW, and PLACEMENTBLOCKAGE regions using the Calibre interface and apply simple Boolean operations to report all locations which are not covered by Fillercells. The Calibre LEF/DEF interface can be used within a command line utility, directly read into DESIGNrev, or as a Calibre nmDRC solution.
Our Calibre How-To video series is designed to provide quick and easy solutions to your common problems and questions. The Calibre product suite integrates with all major EDA design tools you use in your IC design flow.