FPGA methodology for testing interoperability of display technologies in pre-silicon using Siemens proFPGA

Display technologies rely heavily on panel interoperability as the interpretation of Display Port technology (DP) and High-Definition Multimedia Interface technology (HDMI) specifications can vary from one panel vendor to another. Making changes to silicon to fix interoperability issues is very expensive and impacts time to market. Hence, it is critical to perform validation of hardware in pre-silicon using panels to avoid any interoperability issues during silicon enabling. Most existing FPGA platforms have either a fixed DP port or HDMI port which limits the hardware testing capabilities of such platforms.

This presentation shows how we used Siemens proFPGA platform to overcome this limitation by using the flexibility to configure and connect daughter cards using the FMC interface which paved the way to validate various Display technologies on the same platform. We also talk about how Display IP was optimized for FPGA performance and resource utilization, how it limits the Display IP bandwidth, and how oversampling was used to overcome this limitation and meet the requirements of the PHY. We also show how this ecosystem provides a hardware-backed solution for validation of Intel Display Graphics Driver software stack in pre-silicon using live display panels which is not possible using simulation and emulation tools.