Advanced Physical Verification Flows for 3D ICs

The development of 3D integrated circuits (3D ICs) has opened up new possibilities for designing high-performance, low-power, and compact systems. However, 3D ICs also pose significant challenges for physical verification, as they involve multiple layers of heterogeneous technologies and complex interconnections.

In this presentation, we will discuss data management and verification methodology for 3D ICs, including DRC, LVS and other verification checks for individual components and full systems. We will discuss the latest standards for 3D IC flows. We will also talk about a few very critical challenges in the current 3D IC flow and how we address them with EDA tools and our custom solutions. Also, an overview of 3D IC verification flow using Siemens XSI and Calibre 3DStack used for internal products will be presented.