Making DRC debug more focused improves designer productivity

IC design verification gets exponentially harder with each new process technology node, as new manufacturing constraints impose new design layout requirements. The increasing number and complexity of DRC not only increases DRC runtime and the results debugging cycle time, but it also affects the setup of the signoff DRC job, and the designer’s ability to perform focused and effective DRC debugging. Solutions are available that can improve the effectiveness and efficiency of the error debugging and reporting process.

Automating DRC verification setup improves IC designer productivity

The Calibre Interactive and Calibre RVE tools help designers specify DRC options in a simple, maintainable, and reproducible setup, categorize and prioritize DRC results, perform focused DRC debug, and automatically generate status reports in a repeatable fashion. The results categories, filters, and visualization of results in the design environment improve designers’ DRC debug productivity by allowing them to focus on design-critical tasks to optimize their design. Designers can easily configure, generate, and share status reports with stakeholders in a timely manner.