Assume Nothing: Clearing Up Common Misconceptions About Multi-Patterning
Multi-patterning makes IC design and manufacture possible at advanced nodes. However, the complexity of the process, and the potential costs of failure, speak to the need for a clear understanding of the process and its limitations. Eliminating any misconceptions and assumptions surrounding the decomposition of layouts is a necessary step in the effective and efficient use of multi-patterning technology.
Multi-patterning processes
Many designers think of multi-patterning decomposition and coloring checks as similar to design rule checking. In fact, it operates much more like place and route or dummy fill, with many legal solutions. Understanding how and why multi-patterning works can help you understand and eliminate the MP issues you encounter in your layouts. We review some fundamental concepts of litho-etch double, triple and quadruple patterning strategies, and how we might all consider changing our expectations based on these concepts.
Related resources
LG Electronics: Video Encoder IP Design Optimization and Verification Using the Catapult Platform
Through a new design approach, LGE's SoC Center concluded that adopting Catapult in IP development significantly increases efficiency in terms of time and cost, and plan to increase Catapult use in future IP development projects.
NVIDIA: High-Level Synthesis in Agile System-on-Chip Flows: Overview and Techniques
This talk provides a brief overview of NVIDIA Research’s use of Catapult HLS and highlights some useful features and flows of the Connections library, such as the ability to back-annotate SystemC simulations.
LG Electronics: Video Encoder IP Design Optimization and Verification Using Catapult
In this session, LGE describes a new design approach which concluded that adopting Catapult in IP development increases efficiency in time and cost, and they plan to increase usage in future IP projects.