Technical Paper

A comprehensive approach to 3D IC physical verification: DRC, LVS and beyond

Close-up, high-magnification image of a microchip die showing detailed circuitry, gold wire bonds, and metallic connection pads around the perimeter; intricate patterns highlight the complex internal structure and layered design of an integrated circuit.

3D integrated circuits (3D ICs) are reshaping semiconductor development. While these architectures deliver significant performance, power and integration gains, they introduce new challenges in verification—across electrical, thermal and mechanical domains. Siemens Calibre offers a comprehensive platform for 3D IC physical verification, linking DRC, LVS, advanced thermal simulation, mechanical stress and reliability-driven checks for holistic, multiphysics sign-off. This paper outlines the methods and tools necessary to deliver robust, reliable 3D ICs, detailing how to manage complexity and minimize risk throughout the development cycle.

What you’ll learn:

  • Why 3D IC physical verification requires multiphysics analysis across electrical, thermal and mechanical domains
  • How DRC and LVS expand in scope for stacked, heterogeneous assemblies
  • Steps for creating power and materials maps and running thermal, stress and EM/IR checks
  • Real-world integration strategies for team collaboration and workflow automation
  • How Calibre’s tools deliver reliable sign-off for next-generation 3D ICs

Who should read this:

  • 3D IC and advanced packaging engineers
  • Physical verification, DRC/LVS, and reliability analysis professionals
  • Project and CAD managers overseeing multiphysics sign-off
  • Packaging and system-integration teams adopting 3D architectures

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