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fact sheet

The Aprisa place-and-route solution

The Aprisa place-and-route solution

Screen capture of a chip design layout
The detail-route-centric Aprisa automatic digital place-and-route (P&R) system offers complete functionalities for both top-level hierarchical design and block-level physical implementation for complex digital IC design projects. It includes cutting-edge technologies in proto-typing, floor-planning, chip-assembly, placement, clock tree synthesis, routing, optimization, and embedded analysis engines.

The core of the technology is the detail-route-centric architecture and hierarchical database, specifically developed to address the design challenges with advanced FinFET technology.

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