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RISC-V debug and trace with Tessent Embedded Analytics

Tessent Embedded Analytics provides designers and users of RISC-V processors with semiconductor IP and tools for run control and trace the ecosystem requires. Our trace encoder specification was part of the RISC-V standards definition effort, so you can be confident in the run control and trace features for RISC-V silicon debug and bring-up.

Tessent Embedded Analytics consists of three classes of IP block: Analytics modules, message infrastructure, and communicators. We provide a stand-alone integrated development environment (IDE), including workflows, and the necessary tools for 3rd party IDE vendors to integrate embedded analytics functionality into their products. These enable configuration of and interaction with silicon IP, as well as viewing of analytics data.