Calibre DesignEnhancer

The Calibre DesignEnhancer platform offers P&R and custom/analog design teams a fast, integrated environment for implementing Calibre-clean design modifications to reduce IR drop and EM and prepare for physical verification. Three use models support the design-stage application of Calibre-clean IC design layout optimization to help design teams achieve their PPA goals and move to physical verification faster, with Calibre confidence. Push-button usability provides ease of use, and as part of the Calibre nmPlatform, the Calibre DesignEnhancer tool seamlessly integrates with all major IC design and P&R tools, and offers unparalleled runtime performance.

Automated IC design-stage layout optimizations support shift-left productivity enhancement

The faster a design can progress from implementation to signoff verification, the better the chances are of meeting tapeout schedules. The Calibre DesignEnhancer tool is part of a growing suite of shift left tools within the Calibre nmPlatform designed to support the earlier application of design physical verification and optimization to help design teams achieve their PPA and physical verification goals faster, and with Calibre confidence. The Calibre DesignEnhancer tool offers design teams automated, analysis-based, design-stage layout enhancement with Calibre-clean results. Multiple use models provide a range of options to meet all design needs. Ease of use combined with fast runtimes offers P&R and custom/analog design teams a fast, integrated environment for implementing design modifications to reduce IR drop and EM and prepare for physical verification, while ensuring Calibre quality and confidence in the results.