SemiDynamics: Prototyping acceleration using VPS - the Cervell use case

Multicore SoC architecture prototyping often presents challenges when designs largely exceed the capabilities of single-device utilisation resources, requiring diverse optimisation strategies and eventually partitioning across multiple devices.Long ago, Semidynamics developed its own in-house F2F link IP, enabling multi-device design partitioning using standard bus SoC interfaces.

This IP was originally deployed for modular FPGA COTS boards and later migrated to the Siemens proFPGA platform. As the company's products evolved in both functionality and complexity, the F2F approach successfully employed over the years required frequent upgrades to keep pace with the new designs. Adopting VPS largely accelerated the Cervell architecture prototyping and bring-up, while unlocking the full potential of the proFPGA platform, streamlining integration, reducing iteration cycle time and supporting IP SoC design, verification and functional validation.