Yield improvement is a goal of designers and fabs. For the past 20 years, designers could predict and prevent systematic hotspots that cause yield escapes through design rule checks supplemented by optical rule checks (ORC) and lithography rule checks (LRC) done by trained lithography and etch models. That approach is running out of steam because of the growing complexity of multipatterned processes and 3D integration.
This video describes the Siemens EDA machine learning technologies that predict and prevent systematic hotspots and improve edge placement errors (EPE) for better manufacturing yield in today's advanced node designs. It also describes Calibre's neural network assisted resist model, etch model and optical proximity correction (OPC). This presentation was originally delivered at Semicon China 2020.
Calibre SONR machine learning can provide answers to common challenges in design enablement. For example,
How are these questions to be answered? Often, the designer doesn't have any models or manufacturing information, or process models exist somewhere in the company but I can't seem to get them.
This where applying machine learning, either unsupervised, semi-supervised, or supervised, can supply the answers.