Reduce design risk: how to verify high-speed serial links for protocol compliance before PCB fabrication

How do you verify high-speed serial links once your PCB layout is complete but before you send the design out for prototype fabrication? Most companies use one of three methods:

- Design to vendor guidelines and “hope for the best”

- Use an external consultant to simulate the design

- Wait for an internal SI expert to run simulation

Needless to say, we don't think any of these are great options - but this is the best most companies can do. In this webinar, we'll discuss a structured approach for verifying proper layout of all your high-speed serial links - an approach that allows you to find potential problems as quickly as possible, with a minimum of effort.

What You Will Learn:

- Progressive Verification finds problems faster with less effort

- HyperLynx lets you verify all your serial links, instead of just a select few

- How to scale 3D EM solver performance to meet your turnaround needs

- HyperLynx Protocol Compliance works without vendor-specific simulation models

- How to make the best use of valuable (and scarce) SI expertise