Whitepaper
Complementing functional verification through use of available timing information
Top performing semiconductor companies are supporting their growth by adopting product lifecycle management solutions, advancing digitalization, and improving process efficiency.
Since the advent of formal techniques, the applications of formal analysis have helped designers to achieve more in-depth analysis and coverage of their verification activities. However, what helped the growth and popularity of such techniques has been specific and targeted applications of formal analysis.
In this paper, we will examine several examples where the functional verification tasks can benefit from timing information often readily available in the design.