Designing PSS environment integration for maximum reuse

This paper highlights the challenges in productively integrating PSS with UVM-based testbench and embedded-software environments. It covers key criteria for a PSS/environment integration that maximizes reuse of both the environment elements and the PSS description. And it describes key elements of a framework that maximizes PSS and test realization reuse across UVM-based testbench environments, and between UVM and embedded-software environments.