Marvell: Overcoming ESD verification challenges for 3D IC designs

The quest for increased power, performance and area (PPA) efficiency, particularly in the realm of digital design, has driven many designs to smaller process nodes. To continue scaling, many have looked to 3D IC technologies, which are becoming ubiquitous for some solution spaces. Electrostatic discharge (ESD) verification is a challenge requiring out of box thinking and innovative solutions.

Marvell shares their experience with Calibre 3DPERC and their scaling journey.